The design of voltage-referenced, high precision analog circuits has become more challenging as advances in integrated circuit (IC) technology have led to smaller feature sizes and lower IC operating voltage levels. For example, in flash analog-to-digital converters (ADCs), reductions in IC operating voltage levels have resulted in smaller dynamic ranges. In order to maintain the same resolution in a flash ADC implemented in these lower voltage IC technologies, the voltage reference step (known as the least significant bit (LSB)) of a flash ADC has to be correspondingly reduced. However, any reduction in the voltage reference step is typically limited by inherent offsets in the comparators of a flash ADC, caused by random mismatches between transistors produced in the IC process. These offset can be reduced with the help of calibration, but not totally eliminated. As a result, bubbles can be produced in the thermometer code of common flash ADCs. These bubbles can result in large sparkle errors, which degrade the bit error rate (BER) of a flash ADC.
Therefore, what is needed is a system for detecting and correcting bubble errors.
The present invention will be described with reference to the accompanying drawings. The drawing in which an element first appears is typically indicated by the leftmost digit(s) in the corresponding reference number.